Design Summary: "PE"
GDS Preview
Reviewer Name/ID:
Full PE Metrics
| - |
units |
import_verilog0 |
convert_verilog0 |
syn0 |
floorplan0 |
place0 |
cts0 |
route0 |
write_gds0 |
write_data0 |
| errors |
|
0 |
--- |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
| warnings |
|
2 |
--- |
2 |
82 |
84 |
80 |
80 |
0 |
40 |
| drvs |
|
--- |
--- |
--- |
--- |
0 |
0 |
0 |
--- |
0 |
| drcs |
|
--- |
--- |
--- |
--- |
--- |
--- |
0 |
--- |
--- |
| unconstrained |
|
--- |
--- |
--- |
24 |
24 |
24 |
24 |
--- |
24 |
| cellarea |
um^2 |
--- |
--- |
6.532 |
6.940 |
8.821 |
8.821 |
8.821 |
--- |
8.821 |
| totalarea |
um^2 |
--- |
--- |
--- |
15.105 |
15.105 |
15.105 |
15.105 |
--- |
15.105 |
| utilization |
% |
--- |
--- |
--- |
45.946 |
58.398 |
58.398 |
58.398 |
--- |
58.398 |
| logicdepth |
|
--- |
--- |
--- |
0 |
0 |
0 |
0 |
--- |
0 |
| peakpower |
mw |
--- |
--- |
--- |
0.000 |
0.000 |
0.000 |
0.000 |
--- |
0.000 |
| leakagepower |
mw |
--- |
--- |
--- |
0.000 |
0.000 |
0.000 |
0.000 |
--- |
0.000 |
| irdrop |
mv |
--- |
--- |
--- |
--- |
--- |
--- |
--- |
--- |
0.002 |
| holdpaths |
|
--- |
--- |
--- |
--- |
0 |
0 |
0 |
--- |
0 |
| setuppaths |
|
--- |
--- |
--- |
--- |
0 |
0 |
0 |
--- |
0 |
| macros |
|
--- |
--- |
--- |
0 |
0 |
0 |
0 |
--- |
0 |
| cells |
|
--- |
--- |
59 |
85 |
85 |
85 |
85 |
--- |
85 |
| registers |
|
--- |
--- |
8 |
8 |
8 |
8 |
8 |
--- |
8 |
| buffers |
|
--- |
--- |
--- |
8 |
8 |
8 |
8 |
--- |
8 |
| inverters |
|
--- |
--- |
--- |
9 |
9 |
9 |
9 |
--- |
9 |
| pins |
|
--- |
--- |
35 |
35 |
35 |
35 |
35 |
--- |
35 |
| nets |
|
--- |
--- |
78 |
78 |
78 |
78 |
78 |
--- |
78 |
| vias |
|
--- |
--- |
--- |
--- |
--- |
--- |
437 |
--- |
--- |
| wirelength |
um |
--- |
--- |
--- |
--- |
--- |
--- |
109.000 |
--- |
--- |
| memory |
B |
22.172M |
78.035M |
112.277M |
439.336M |
1.916G |
514.945M |
1.135G |
520.113M |
524.207M |
| exetime |
s |
00.390 |
00.270 |
02.250 |
04.379 |
05.830 |
04.559 |
07.290 |
03.000 |
12.810 |
| tasktime |
s |
00.933 |
00.644 |
05.968 |
05.515 |
06.959 |
05.058 |
08.075 |
04.821 |
13.625 |
| totaltime |
s |
00.933 |
01.578 |
39.309 |
44.825 |
51.784 |
56.843 |
01:04.919 |
01:09.740 |
01:18.544 |
Metrics for PE Tasks
| errors |
warnings |
drvs |
drcs |
unconstrained |
cellarea |
totalarea |
utilization |
logicdepth |
peakpower |
leakagepower |
irdrop |
holdpaths |
setuppaths |
macros |
cells |
registers |
buffers |
inverters |
pins |
nets |
vias |
wirelength |
memory |
exetime |
tasktime |
totaltime |
| 0 |
2 |
--- |
--- |
--- |
--- |
--- |
--- |
--- |
--- |
--- |
--- |
--- |
--- |
--- |
--- |
--- |
--- |
--- |
--- |
--- |
--- |
--- |
22.172MB |
00.390s |
00.933s |
00.933s |
| errors |
warnings |
drvs |
drcs |
unconstrained |
cellarea |
totalarea |
utilization |
logicdepth |
peakpower |
leakagepower |
irdrop |
holdpaths |
setuppaths |
macros |
cells |
registers |
buffers |
inverters |
pins |
nets |
vias |
wirelength |
memory |
exetime |
tasktime |
totaltime |
| --- |
--- |
--- |
--- |
--- |
--- |
--- |
--- |
--- |
--- |
--- |
--- |
--- |
--- |
--- |
--- |
--- |
--- |
--- |
--- |
--- |
--- |
--- |
78.035MB |
00.270s |
00.644s |
01.578s |
| errors |
warnings |
drvs |
drcs |
unconstrained |
cellarea |
totalarea |
utilization |
logicdepth |
peakpower |
leakagepower |
irdrop |
holdpaths |
setuppaths |
macros |
cells |
registers |
buffers |
inverters |
pins |
nets |
vias |
wirelength |
memory |
exetime |
tasktime |
totaltime |
| 0 |
2 |
--- |
--- |
--- |
6.532um^2 |
--- |
--- |
--- |
--- |
--- |
--- |
--- |
--- |
--- |
59 |
8 |
--- |
--- |
35 |
78 |
--- |
--- |
112.277MB |
02.250s |
05.968s |
39.309s |
| errors |
warnings |
drvs |
drcs |
unconstrained |
cellarea |
totalarea |
utilization |
logicdepth |
peakpower |
leakagepower |
irdrop |
holdpaths |
setuppaths |
macros |
cells |
registers |
buffers |
inverters |
pins |
nets |
vias |
wirelength |
memory |
exetime |
tasktime |
totaltime |
| 0 |
82 |
--- |
--- |
24 |
6.940um^2 |
15.105um^2 |
45.946% |
0 |
0.000mw |
0.000mw |
--- |
--- |
--- |
0 |
85 |
8 |
8 |
9 |
35 |
78 |
--- |
--- |
439.336MB |
04.379s |
05.515s |
44.825s |
| errors |
warnings |
drvs |
drcs |
unconstrained |
cellarea |
totalarea |
utilization |
logicdepth |
peakpower |
leakagepower |
irdrop |
holdpaths |
setuppaths |
macros |
cells |
registers |
buffers |
inverters |
pins |
nets |
vias |
wirelength |
memory |
exetime |
tasktime |
totaltime |
| 0 |
84 |
0 |
--- |
24 |
8.821um^2 |
15.105um^2 |
58.398% |
0 |
0.000mw |
0.000mw |
--- |
0 |
0 |
0 |
85 |
8 |
8 |
9 |
35 |
78 |
--- |
--- |
1.916GB |
05.830s |
06.959s |
51.784s |
| errors |
warnings |
drvs |
drcs |
unconstrained |
cellarea |
totalarea |
utilization |
logicdepth |
peakpower |
leakagepower |
irdrop |
holdpaths |
setuppaths |
macros |
cells |
registers |
buffers |
inverters |
pins |
nets |
vias |
wirelength |
memory |
exetime |
tasktime |
totaltime |
| 0 |
80 |
0 |
--- |
24 |
8.821um^2 |
15.105um^2 |
58.398% |
0 |
0.000mw |
0.000mw |
--- |
0 |
0 |
0 |
85 |
8 |
8 |
9 |
35 |
78 |
--- |
--- |
514.945MB |
04.559s |
05.058s |
56.843s |
| errors |
warnings |
drvs |
drcs |
unconstrained |
cellarea |
totalarea |
utilization |
logicdepth |
peakpower |
leakagepower |
irdrop |
holdpaths |
setuppaths |
macros |
cells |
registers |
buffers |
inverters |
pins |
nets |
vias |
wirelength |
memory |
exetime |
tasktime |
totaltime |
| 0 |
80 |
0 |
0 |
24 |
8.821um^2 |
15.105um^2 |
58.398% |
0 |
0.000mw |
0.000mw |
--- |
0 |
0 |
0 |
85 |
8 |
8 |
9 |
35 |
78 |
437 |
109.000um |
1.135GB |
07.290s |
08.075s |
01:04.919s |
| errors |
warnings |
drvs |
drcs |
unconstrained |
cellarea |
totalarea |
utilization |
logicdepth |
peakpower |
leakagepower |
irdrop |
holdpaths |
setuppaths |
macros |
cells |
registers |
buffers |
inverters |
pins |
nets |
vias |
wirelength |
memory |
exetime |
tasktime |
totaltime |
| 0 |
0 |
--- |
--- |
--- |
--- |
--- |
--- |
--- |
--- |
--- |
--- |
--- |
--- |
--- |
--- |
--- |
--- |
--- |
--- |
--- |
--- |
--- |
520.113MB |
03.000s |
04.821s |
01:09.740s |
| errors |
warnings |
drvs |
drcs |
unconstrained |
cellarea |
totalarea |
utilization |
logicdepth |
peakpower |
leakagepower |
irdrop |
holdpaths |
setuppaths |
macros |
cells |
registers |
buffers |
inverters |
pins |
nets |
vias |
wirelength |
memory |
exetime |
tasktime |
totaltime |
| 0 |
40 |
0 |
--- |
24 |
8.821um^2 |
15.105um^2 |
58.398% |
0 |
0.000mw |
0.000mw |
0.002mv |
0 |
0 |
0 |
85 |
8 |
8 |
9 |
35 |
78 |
--- |
--- |
524.207MB |
12.810s |
13.625s |
01:18.544s |